GPD User Community Support Forum

GPD release DSDT source code for community to find where problems are?

GPD HK
This is the source code of DSDT for P2 Max,you can download and see where the problems are. http://www.gpd.hk/filedownload/29345

For ease I’ve also attached here (in case the link disappears)
dsdt.rar (1.3 KB)

Extracting the rar we get one file DSDT.txt

  Device (TCSE)
  {
    Name (_ADR, Zero) // _ADR: Address
    Name (_HID, "GDIX1002") // _HID: Hardware ID    JC10201
    Name (_CID, "GDIX1002") // _CID: Compatible ID  JC10201
    Name (_S0W, Zero) // _S0W: S0 Device Wake State
    Name (_DEP, Package() {\_SB.PCI0.GPI0,\_SB.PCI0.I2C2})
    Name (SBFB, ResourceTemplate () {
      I2cSerialBus (0x0014,ControllerInitiated,400000,AddressingMode7Bit,"\\_SB.PCI0.I2C2",,,I2CB)
    })
    Name (SBFG, ResourceTemplate () {
      GpioInt (Edge, ActiveLow, Exclusive, PullDefault, 0x0000, "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer,INTG ) { 0 }
      GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.PCI0.GPI0",,,RSTG) {0}
    })
    CreateWordField(SBFB,I2CB._ADR,BADR)
    CreateDWordField(SBFB,I2CB._SPE,SPED)
    CreateWordField (SBFG,INTG._PIN,INT1)
    CreateWordField (SBFG,RSTG._PIN,TRST)

    Method(_INI) {
      Store(GNUM(GPIO_SKL_LP_GPP_F8), INT1)
      Store(GNUM(GPIO_SKL_LP_GPP_F9), TRST)
      SHPO(GPIO_SKL_LP_GPP_F8, 1) // configure gpio pad in gpio driver mode
      SHPO(GPIO_SKL_LP_GPP_F9, 1) // configure gpio pad in gpio driver mode
      Store(0x14, BADR)        // I2C Address
      Store(400000, SPED)      // I2C Speed
      return
    }
    Method (_CRS, 0, NotSerialized) {
      Return (ConcatenateResTemplate(SBFB, SBFG))
    }
    Method (_STA, 0, NotSerialized) // _STA: Status
    {
       Return(0x0f)
    }
//JC20501 >> use _PS0 _PS3 Method
    Method (_PS0, 0, Serialized)
    {
      \_SB.SGOV(GPIO_SKL_LP_GPP_F9, 0)
      Sleep(35)
      \_SB.SGOV(GPIO_SKL_LP_GPP_F9, 1)
      Sleep(120)
    }
    Method (_PS3, 0, Serialized) 
    {
      \_SB.SGOV(GPIO_SKL_LP_GPP_F9, 0)
    }
//JC20501 <<
    
    OperationRegion (IADR, SystemMemory, 0xFDAC0440, 0x08)
    Field (IADR, DWordAcc, NoLock, Preserve)
    {
      CNF0, 32,
      CNF1, 32
    }
    
    Name (IOST, 0x00)              // Define IO direction Flag. 0:Input;1:Output.
    Method (INTI, 0, Serialized)
    {
      Store (0x42800102, CNF0)     // Set GPIO_SKL_LP_GPP_F8 as Input direction, and InterruptEdge,etc...
      Store (0x02003038, CNF1)     // Set GPIO_SKL_LP_GPP_F8 as Input direction, and InterruptEdge,etc...
      Store (0x00, IOST)           // Set IOST flag as Input.
    }
    Method (INTO, 1, Serialized)
    {
      If (LEqual (Arg0, One))
      {
        Store (0x42800201, CNF0)   // Set GPIO_SKL_LP_GPP_F8 as Output direction, and Pull High.
        Store (0x02003038, CNF1)   // Set GPIO_SKL_LP_GPP_F8 as Output direction, and Pull High.
        Store (0x01, IOST)         // Set IOST flag as Output.
      }
      Else
      {
        If (LEqual (Arg0, Zero))
        {
          Store (0x42800200, CNF0) // Set GPIO_SKL_LP_GPP_F8 as Output direction, and Pull Low.
          Store (0x02003038, CNF1) // Set GPIO_SKL_LP_GPP_F8 as Output direction, and Pull Low.
          Store (0x01, IOST)       // Set IOST flag as Output.
        }
      }
    }
    Method (INTS, 0, Serialized)
    {
      If (LEqual (IOST, 0x00))     // GPIO_SKL_LP_GPP_F8 is Input pin.
      { 
        If(LEqual (CNF0, 0x42800102))
        {
          Return (0x01)   // Return High
        }
        Else
        {
          Return (0x00)   // Return Low
        }
      }
      Else 
      {
        If(LEqual (IOST, 0x01))       // GPIO_SKL_LP_GPP_F8 is Output pin.
        { 
          If(LEqual (CNF0, 0x42800201))
          {
            Return (0x01) // Return High
          }
          Else
          {   
            Return (0x00) // Return Low
          }
        }
      }
    }
  }
}




GPIO CONFIG:

            {GPIO_SKL_LP_GPP_F8 , {GpioPadModeGpio,     GpioHostOwnGpio, GpioDirIn,    GpioOutDefault, GpioIntLevel | GpioIntDis, GpioPlatformReset,  GpioTolerance1v8 | GpioTermWpu20K}}, //TOUCH_PANEL_INT_N //MN116-026+
            {GPIO_SKL_LP_GPP_F9 , {GpioPadModeGpio,     GpioHostOwnGpio, GpioDirOut,   GpioOutHigh,    GpioIntDis, GpioHostDeepReset,  GpioTolerance1v8 | GpioTermWpu20K}}, //TOUCH_PANEL_RESET_N //MN116-026+

I’m not sure if this is useful to anyone but here it is anyway.

I’m also going to tag two people @PeterCxy and @joshwiththegoodhair as they are more likely to know if this DSDT source code has changed from its original form and whether there are any problems with it.

Thanks.

1 Like

It is no more useful than the decompiled one, unfortunately. I have already said the problem – the reset sequence in this DSDT is screwed up. Just remove it and add correct _DSD and let the kernel handle it, exactly as what I did in my hack. And correct the wrong ActiveLow flag to ActiveHigh.

But this may again break the stupid Windows goodix driver in reverse. Since that driver is proprietary to Goodix, we can basically do nothing to that driver. So my suggestion here is to just keep the way it is and use my hacked kernel module for Goodix (and hopefully the patch gets merged into mainline kernel in the future)